Lois et règlements au titre de l'article 63:2 de l'Accord sur les ADPIC ‒ Afficher les détails du document

Protection of Layout Designs (Topographies) of Integrated Circuits Regulations Chapter 17.13.01 (2020 Revised Edition)
These Regulations are made under section 21 of the Protection of Layout-Designs (Topographies) of Integrated Circuits Act [Cap.17.13]. The Regulations provides for the payment of fees in connection with applications for the registration of lay-out designs of integrated circuits and matters related thereto.
See also document IP/N/1/TON/L/1 (Protection of Layout Designs (Topographies) of Integrated Circuits Act)
Ms Distaquaine Tu'ihalamaka Chief Executive Officer Ministry of Trade and Economic Development P.O. Box 110 Nuku'alofa Tonga Telephone: +(676) 7400105 Telefax: +(676) 23887 E-mail: ceo@mted.gov.to Website: www.mted.gov.to